"features" in ARM Linux's /proc/cpuinfo

Ever wonder what these "features" (hardware capabilities) in ARM Linux's /proc/cpuinfo mean ? Here is the answer (from Linux kernel source file arch/arm/include/asm/hwcap.h and arm64/include/uapi/asm/hwcap.h and ARM official doc)

32-bit ARM

26bit Program Counter is 26-bit long
crunch MaverickCrunch instructoin extension. Now obsolete.
edsp DSP Enhancement instructions
evtstrm Virtual event stream
fastmult Fast multiplication
fpa Floating Point Accelerator instructions. Now obsolete.
half ?
idiv Integer divide instructions available in both ARM and Thumb
idiva Integer divide instructions available in ARM only
idivt Integer divide instructions available in Thumb only
iwmmxt Intel Wireless MMX Technology, an implementation of MMX on embedded processors.
java Jazelle technology
lpae Atomic ldrd/strd instructions
neon NEON SIMD instructions
swp SWP (SWaP) instruction, which is used to implement a binary semaphore (mutex)
thumb Thumb instructions
thumbee Thumb Execution Environment
tls Thread local storage
vfp Vector Floating Point instruction extension
vfpv3 Vector Floating Point instruction extension version 3, with 32 double-precision registers
vfpv3d16 Vector Floating Point instruction extension version 3, with 16 double-precision registers
vfpv4 Vector Floating Point instruction extension version 4

64-bit ARM

aesARMv8-a AES crypto extension
afpAlternate floating-point behavior
asimdAdvanced SIMD instructions
asimddpAdvanced SIMD dot product instructions
asimdfhmHalf-precision floating-point FMLAL (Fused Multiply-Add to accumulator) instruction
asimdhp
asimdrdmRounding double multiply accumulate
atomics
bf16Brain half-precision floating-point instructions
btiBranch target identification
cpuid
crc32CRC extension
dcpodpDC CVADP instruction
dcpopDC CVAP (Data or unified Cache line Clean by VA to PoP) instruction
dghData Gathering Hint instruction
ditData Independent Timing instructions
ebf16Extended brain half-precision floating-point instructions
ecvEnhanced counter virtualization
evtstrm
fcmaComplex number addition and multiplication
flagmCondition flag manipulation instructions
flagm2Condition flag manipulation instructions version 2
fpFloating-point instructions
fphpHalf-precision floating-point
frintFloating-point Round to Integer instructions
i8mm8-bit Integer Matrix Multiply instruction
ilrcpc
jscvtSuport for JavaScript conversion from double precision floating point values to integers
lrcpcLoad-acquire RCpc instructions
mteARMv8.5-A Memory Tagging Extension
mte3
pacaPointer authentication (for address authentication)
pacgPointer authentication (for generic authentication)
pmullARMv8-A Polynomial Multiply Long crypto extension
rngARMv8.5-A Random Number instruction
rpresIncreased precision of Reciprocal Estimate and Reciprocal Square Root Estimate
sbSpeculation Barrier instruction
sha1ARMv8-a SHA1 crypto extension
sha2ARMv8-a SHA2 crypto extension
sha3ARMv8.2-A SHA3 crypto extension
sha512ARMv8.2-A SHA512 crypto extension
sm3ARMv8.2-A SM3 crypto extension
sm4ARMv8.2-A SM4 crypto extension
sme
sme_b16f32
sme_f16f32
sme_f32f32
sme_f64f64
sme_fa64
sme_i16i64
sme_i8i32
ssbsSpeculative Store Bypass Safe instruction
sveScalable Vector Extension
sve2ARMv8-A Scalable Vector Extension 2
sveaesSVE AES instruction
svebf16SVE brain half-precision floating-point instructions
svebitpermSVE bitperm instruction
svef32mmSVE single-precision floating-point matrix multiply instruction
svef64mmSVE double-precision floating-point matrix multiply instruction
svei8mmSVE 8-bit Integer Matrix Multiply instruction
svepmullPolynomial Multiply Long crypto extension
svesha3SHA512 and SHA3 crypto extension
svesm4SM4 crypto extension
uscat
wfxtWFET (Wait For Event with Timeout) and WFIT (Wait For Interrupt with Timeout) instructions

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